IRIS
PALUMBO, Francesca
 Distribuzione geografica
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Continente #
NA - Nord America 4.309
AS - Asia 2.485
EU - Europa 1.563
SA - Sud America 1.547
Continente sconosciuto - Info sul continente non disponibili 133
AF - Africa 115
OC - Oceania 6
Totale 10.158
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Nazione #
US - Stati Uniti d'America 4.171
BR - Brasile 1.396
SG - Singapore 1.166
CN - Cina 664
UA - Ucraina 423
DE - Germania 256
SE - Svezia 218
IT - Italia 185
HK - Hong Kong 171
VN - Vietnam 137
FR - Francia 115
GB - Regno Unito 80
CA - Canada 79
FI - Finlandia 66
AR - Argentina 60
RU - Federazione Russa 50
IN - India 46
KR - Corea 41
MX - Messico 39
BD - Bangladesh 36
ZA - Sudafrica 34
TR - Turchia 33
IQ - Iraq 31
BE - Belgio 29
MA - Marocco 29
EC - Ecuador 24
LT - Lituania 22
CZ - Repubblica Ceca 21
ES - Italia 20
JP - Giappone 19
VE - Venezuela 18
CO - Colombia 17
PL - Polonia 17
UZ - Uzbekistan 17
KE - Kenya 14
NL - Olanda 14
AZ - Azerbaigian 13
JO - Giordania 13
PK - Pakistan 11
SA - Arabia Saudita 11
DZ - Algeria 10
AT - Austria 9
AE - Emirati Arabi Uniti 8
NP - Nepal 8
PY - Paraguay 8
TN - Tunisia 8
CL - Cile 7
GE - Georgia 7
ID - Indonesia 7
PE - Perù 7
RO - Romania 7
IL - Israele 6
KG - Kirghizistan 6
AU - Australia 5
EG - Egitto 5
KZ - Kazakistan 5
MY - Malesia 5
UY - Uruguay 5
AL - Albania 4
BO - Bolivia 4
GR - Grecia 4
JM - Giamaica 4
OM - Oman 4
PH - Filippine 4
SN - Senegal 4
BG - Bulgaria 3
BN - Brunei Darussalam 3
CR - Costa Rica 3
HN - Honduras 3
HU - Ungheria 3
PA - Panama 3
QA - Qatar 3
BA - Bosnia-Erzegovina 2
BY - Bielorussia 2
CH - Svizzera 2
CI - Costa d'Avorio 2
DO - Repubblica Dominicana 2
EE - Estonia 2
ET - Etiopia 2
GA - Gabon 2
HR - Croazia 2
KW - Kuwait 2
PR - Porto Rico 2
PT - Portogallo 2
RS - Serbia 2
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A2 - ???statistics.table.value.countryCode.A2??? 1
AM - Armenia 1
AO - Angola 1
BW - Botswana 1
DK - Danimarca 1
EU - Europa 1
GY - Guiana 1
IE - Irlanda 1
IM - Isola di Man 1
IR - Iran 1
LB - Libano 1
LK - Sri Lanka 1
ML - Mali 1
MN - Mongolia 1
Totale 10.020
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Città #
Dallas 993
Singapore 617
San Jose 400
Chandler 398
Jacksonville 255
Ashburn 214
Beijing 202
Hong Kong 169
Princeton 154
Council Bluffs 131
Santa Clara 123
Columbus 112
São Paulo 99
New York 90
Dearborn 86
Nanjing 81
Lauterbourg 76
Ann Arbor 71
Shanghai 59
Los Angeles 55
Wilmington 53
Belo Horizonte 44
Seoul 40
Rio de Janeiro 39
Hanoi 38
Munich 38
Ho Chi Minh City 37
Nanchang 35
Toronto 29
Boardman 27
Brussels 27
Milan 27
Brasília 26
Rome 25
Tianjin 25
Frankfurt am Main 24
Mountain View 23
Sassari 23
The Dalles 23
Brooklyn 22
Johannesburg 21
Brno 20
Jiaxing 20
Montreal 19
Porto Alegre 19
Curitiba 17
San Francisco 17
Warsaw 17
Cagliari 16
Changsha 16
Hebei 16
Helsinki 16
Tokyo 16
Da Nang 15
Guangzhou 15
Shenyang 15
Tashkent 15
Fortaleza 14
Guarulhos 14
London 14
Orem 14
Baghdad 13
Jinan 13
Manaus 13
Nairobi 13
Ottawa 13
Zhengzhou 13
Amman 12
Campinas 12
Houston 12
Mexico City 12
Norwalk 12
Phoenix 12
Baku 11
Chennai 11
Contagem 11
Juiz de Fora 11
Ningbo 11
Salvador 11
Atlanta 10
Bologna 10
Casablanca 10
Caxias do Sul 10
Denver 10
Joinville 10
Quito 10
São José dos Campos 10
Düsseldorf 9
Istanbul 9
Kunming 9
Osasco 9
Ribeirão Preto 9
Várzea Paulista 9
Amsterdam 8
Bogotá 8
Dhaka 8
Goiânia 8
Mumbai 8
Poplar 8
Stockholm 8
Totale 5.762
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Nome #
Reconfigurable and approximate computing for video coding 172
Adaptable AES implementation with power-gating support 171
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project 164
Hardware/Software self-adaptation in CPS: The CERBERO project approach 161
Adaptive software-augmented hardware reconfiguration with dataflow design automation 161
Feasibility Study and Porting of the Damped Least Square Algorithm on FPGA 157
A Novel Non-Exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs 156
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design 156
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case 154
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments 154
A nature-inspired adaptive floating-point coprocessing system 153
Automatic Generation of Dataflow-Based Reconfigurable Co-processing Units 152
A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations 149
A coarse-grained reconfigurable approach for low-power spike sorting architectures 147
Automated power gating methodology for dataflow-based reconfigurable systems 145
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 144
Preface 144
ALOHA: An architectural-aware framework for deep learning at the edge 144
Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators 143
In-Field Automatic Detection of Grape Bunches under a Totally Uncontrolled Environment 143
Power and clock gating modelling in coarse grained reconfigurable systems 142
A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching 140
A coarse-grained reconfigurable wavelet denoiser exploiting the multi-dataflow composer tool 139
A Composable Monitoring System for Heterogeneous Embedded Platforms 136
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation 136
An FPGA platform for real-time simulation of spiking neuronal networks 135
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 134
An integrated hardware/software design methodology for signal processing systems 129
A Dataflow Implementation of Inverse Kinematics on Reconfigurable Heterogeneous MPSoC 129
Optimization and deployment of CNNs at the Edge: The ALOHA experience 128
Demo: Reconfigurable Platform Composer Tool 127
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI 126
Power Modelling for Saving Strategies in Coarse Grained Reconfigurable Systems 126
A surface tension and coalescence model for dynamic distributed resources allocation in Massively Parallel Processors on-Chip 124
FPGA-based Implementation for Industrial Motion Control System 123
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning 123
Feasibility study of real-time spiking neural network simulations on a swarm intelligence based digital architecture 123
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 121
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 119
RVC: A multi-decoder CAL Composer tool 118
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 116
Hardware design methodology using lightweight dataflow and its integration with low power techniques 116
Elicitation of technical requirements in large research projects: The CERBERO approach 115
Power-awarness in coarse-grained reconfigurable designs: A dataflow based strategy 113
Towards self-adaptive networks on chip for massively parallel processors: Multilevel quality of service programmability 109
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding 107
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project 106
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 106
Cross-layer design of reconfigurable cyber-physical systems 106
Coarse-Grained Reconfigurable Approach for Multi-Dataflow Systems 106
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract 103
Non-Exclusive Dual-Mode Approach for NoC Designs 103
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding 101
Low power design methodology for signal processing systems using lightweight dataflow techniques 100
Message from the General Chairs 99
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain 99
sysCgrid: SystemC grid simulation framework 98
Multi-purpose systems: A novel dataflow-based generation and mapping strategy 97
Coarse-grained reconfiguration: dataflow-based power management 96
Challenging CPS trade-off adaptivity with coarse-grained reconfiguration 96
Dataflow modeling for reconfigurable signal processing systems 95
PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs 95
DSE and profiling of multi-context coarse-grained reconfigurable systems 94
Computing Swarms for Self-Adaptiveness and Self-Organization in Floating Point Array Processing 93
Profiling of Dataflow-Based Coarse-Grained Reconfigurable Platforms 93
Exploring the performance of partially reconfigurable point-to-point interconnects 93
Multi-grain reconfiguration for advanced adaptivity in cyber-physical systems 91
Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology 90
Message from the Program Chairs 89
Design IP Faster: Introducing the C~ High-Level Language 88
Multithread Accelerators on FPGAs: A Dataflow-Based Approach 87
MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems 85
Unmanned vehicles in smart farming: A survey and a glance at future horizons 85
The multi-dataflow composer tool: A runtime reconfigurable HDL platform composer 85
Introduction to the 2nd workshop on design of low Power EMbedded Systems 85
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC 85
PathTracing: Raising the level of understanding of processing latency in heterogeneous MPSoCs 84
Impact of half-duplex and full-duplex DMA Implementations on NoC performance 84
The FitOptiVis ECSEL Project: Highly Efficient Distributed Embedded Image/Video Processing in Cyber-Physical Systems Invited Pape 83
Editorial: Special Issue on Computing Frontiers 83
Front Matter, Table of Contents, Preface, Conference Organization 81
SECURED for Health: Scaling Up Privacy to Enable the Integration of the European Health Data Space 79
Concurrent hybrid switching for massively parallel systems-on-chip: The CYBER architecture 74
On-the-fly adaptivity for process networks over shared-memory platforms 74
Hybrid switching techniques for heterogeneous traffic support in multi-processors system on chip and massively parallel processors 74
Preface to the Special Issue on Methods, Tools, and Architectures for Signal and Image Processing 73
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms 70
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design 64
Preface 62
Totale 10.158
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Categoria #
all - tutte 42.813
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 42.813
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022292 0 0 1 3 3 1 6 27 22 26 42 161
2022/2023834 83 23 25 111 91 129 45 107 148 5 41 26
2023/2024327 48 24 5 7 52 55 0 19 0 6 54 57
2024/20253.037 29 12 144 73 181 160 160 652 1.108 334 140 44
2025/20263.515 176 879 292 571 371 203 574 95 125 124 67 38
2026/2027466 142 222 102 0 0 0 0 0 0 0 0 0
Totale 10.158