PALUMBO, Francesca

PALUMBO, Francesca  

SCIENZE BIOMEDICHE  

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Risultati 1 - 20 di 77 (tempo di esecuzione: 0.032 secondi).
Titolo Data di pubblicazione Autore(i) File
A coarse-grained reconfigurable approach for low-power spike sorting architectures 1-gen-2013 Carta, N; Sau, C; Pani, D; Palumbo, Francesca; Raffo, L.
A coarse-grained reconfigurable wavelet denoiser exploiting the multi-dataflow composer tool 1-gen-2013 Carta, N; Sau, C; Palumbo, Francesca; Pani, D; Raffo, L.
A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations 1-gen-2010 Pani, D; Palumbo, Francesca; Raffo, L.
A nature-inspired adaptive floating-point coprocessing system 1-gen-2012 Sau, C; Pani, D; Palumbo, Francesca; Raffo, L.
A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching 1-gen-2008 Secchi, S; Palumbo, Francesca; Pani, D; Raffo, L.
A Novel Non-Exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs 1-gen-2008 Palumbo, Francesca; Secchi, S; Pani, D; Raffo, L.
A surface tension and coalescence model for dynamic distributed resources allocation in Massively Parallel Processors on-Chip 1-gen-2008 Palumbo, Francesca; Pani, D; Raffo, L; Secchi, S.
Adaptable AES implementation with power-gating support 1-gen-2016 Banik, Subhadeep; Bogdanov, Andrey; Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca; Regazzoni, Francesco
Adaptive software-augmented hardware reconfiguration with dataflow design automation 1-gen-2018 Rubattu, Claudio; Palumbo, Francesca; Pelcat, Maxime
ALOHA: An architectural-aware framework for deep learning at the edge 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, M.; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F.
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1-gen-2019 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintort, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I.
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case 1-gen-2014 Sau, C; Raffo, L; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M.
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 1-gen-2015 Sau, C; Meloni, P; Raffo, L; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M.
Automated power gating methodology for dataflow-based reconfigurable systems 1-gen-2015 Fanni, T; Sau, C; Raffo, L; Palumbo, Francesca
Automatic Generation of Dataflow-Based Reconfigurable Co-processing Units 1-gen-2014 Sau, C; Palumbo, Francesca
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments 1-gen-2019 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Pulina, Luca; Raffo, Luigi; Masin, Michael; Shindin, Evgeny; Rojas, Pablo Sanchez De; Desnos, Karol; Pelcat, Maxime; Rodríguez, Alfonso; Juárez, Eduardo; Regazzoni, Francesco; Meloni, Giuseppe; Zedda, Katiuscia; Myrhaug, Hans; Kaliciak, Leszek; Andriaanse, Joost; Filho, Juliode Olivieria; Munõz, Pablo; Toffetti, Antonella
Challenging CPS trade-off adaptivity with coarse-grained reconfiguration 1-gen-2019 Palumbo, Francesca; Sau, Carlo; Fanni, Tiziana; Raffo, Luigi
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 1-gen-2017 Sau, Carlo; Palumbo, Francesca; Pelcat, Maxime; Heulot, Julien; Nogues, Erwan; Menard, Daniel; Meloni, Paolo; Raffo, Luigi
Coarse-Grained Reconfigurable Approach for Multi-Dataflow Systems 1-gen-2011 Carta, N; Palumbo, Francesca; Raffo, L.
Coarse-grained reconfiguration: dataflow-based power management 1-gen-2015 Palumbo, Francesca; Sau, C; Raffo, L.