RAFFO, Luigi

RAFFO, Luigi  

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Titolo Data di pubblicazione Autore(i) File
A Custom dual-processor System for Real-time Neural Signal Processing 1-gen-2016 Meloni, P.; Rubattu, C.; Tuveri, G.; Raffo, L.
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments 1-gen-2019 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Pulina, Luca; Raffo, Luigi; Masin, Michael; Shindin, Evgeny; Rojas, Pablo Sanchez De; Desnos, Karol; Pelcat, Maxime; Rodríguez, Alfonso; Juárez, Eduardo; Regazzoni, Francesco; Meloni, Giuseppe; Zedda, Katiuscia; Myrhaug, Hans; Kaliciak, Leszek; Andriaanse, Joost; Filho, Juliode Olivieria; Munõz, Pablo; Toffetti, Antonella
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 1-gen-2017 Sau, Carlo; Palumbo, Francesca; Pelcat, Maxime; Heulot, Julien; Nogues, Erwan; Menard, Daniel; Meloni, Paolo; Raffo, Luigi
Design and usability assessment of a multi-device SOA-based telecare framework for the elderly. 1-gen-2020 Macis, S; Loi, D; Ulgheri, A; Pani, D; Solinas, G; La Manna, S; Cestone, V; Guerri, D; Raffo, L.
Feasibility Study and Porting of the Damped Least Square Algorithm on FPGA 1-gen-2020 Sau, C; Fanni, T; Rubattu, C; Fanni, L; Raffo, L; Palumbo, F
Feasibility study of real-time spiking neural network simulations on a swarm intelligence based digital architecture 1-gen-2017 Palumbo, Francesca; Sau, Carlo; Pani, Danilo; Meloni, Paolo; Raffo, Luigi
Hardware design methodology using lightweight dataflow and its integration with low power techniques 1-gen-2017 Fanni, Tiziana; Li, Lin; Viitanen, Timo; Sau, Carlo; Xie, Renjie; Palumbo, Francesca; Raffo, Luigi; Huttunen, Heikki; Takala, Jarmo; Bhattacharyya, Shuvra S.
Hardware/Software self-adaptation in CPS: The CERBERO project approach 1-gen-2019 Palumbo, F.; Fanni, T.; Sau, C.; Rodriguez, A.; Madronal, D.; Desnos, K.; Morvan, A.; Pelcat, M.; Rubattu, C.; Lazcano, R.; Raffo, L.; de la Torre, E.; Juarez, E.; Sanz, C.; Sanchez de Rojas, P.
Multithread Accelerators on FPGAs: A Dataflow-Based Approach 1-gen-2022 Ratto, Francesco; Esposito, Stefano; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning 1-gen-2020 Nasser, Y.; Sau, C.; Prévotet, ; J., -C.; Fanni, T.; Palumbo, F.; Hélard, M.; Raffo, L.
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding 1-gen-2019 Sau, C.; Ligas, D.; Fanni, T.; Raffo, L.; Palumbo, F.
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI 1-gen-2019 Fanni, Tiziana; Madroñal, Daniel; Rubattu, Claudio; Sau, Carlo; Palumbo, Francesca; Juárez, Eduardo; Pelcat, Maxime; Sanz, Cesar; Raffo, Luigi
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design 1-gen-2020 Sau, C.; Fanni, T.; Rubattu, C.; Raffo, L.; Palumbo, F.