In this paper, we propose a reconfigurable design of the Ad-vanced Encryption Standard capable of adapting at run-Time to the requirements of the target application. Reconfiguration is achieved by activating only a specific subset of all the instantiated processing elements. Further, we explore the effectiveness of power gating and clock gating methodologies to minimize the energy consumption of the processing elements not involved in computation.
Adaptable AES implementation with power-gating support / Banik, Subhadeep; Bogdanov, Andrey; Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca; Regazzoni, Francesco. - (2016), pp. 331-334. (Intervento presentato al convegno ACM International Conference on Computing Frontiers, CF 2016 tenutosi a ita nel 2016) [10.1145/2903150.2903488].
Adaptable AES implementation with power-gating support
PALUMBO, Francesca;
2016-01-01
Abstract
In this paper, we propose a reconfigurable design of the Ad-vanced Encryption Standard capable of adapting at run-Time to the requirements of the target application. Reconfiguration is achieved by activating only a specific subset of all the instantiated processing elements. Further, we explore the effectiveness of power gating and clock gating methodologies to minimize the energy consumption of the processing elements not involved in computation.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
