Sfoglia per Autore  PALUMBO, Francesca

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Mostrati risultati da 1 a 20 di 77
Titolo Data di pubblicazione Autore(i) File
Non-Exclusive Dual-Mode Approach for NoC Designs 1-gen-2008 Palumbo, Francesca; Secchi, S; Pani, D; Raffo, L.
A surface tension and coalescence model for dynamic distributed resources allocation in Massively Parallel Processors on-Chip 1-gen-2008 Palumbo, Francesca; Pani, D; Raffo, L; Secchi, S.
A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching 1-gen-2008 Secchi, S; Palumbo, Francesca; Pani, D; Raffo, L.
A Novel Non-Exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs 1-gen-2008 Palumbo, Francesca; Secchi, S; Pani, D; Raffo, L.
sysCgrid ? SystemC grid simulation framework 1-gen-2009 Palumbo, Francesca; Pani, D; Raffo, L.
RVC: A multi-decoder CAL Composer tool 1-gen-2010 Palumbo, Francesca; Pani, D; Manca, E; Raffo, L; Mattavelli, M; Roquier, G.
A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations 1-gen-2010 Pani, D; Palumbo, Francesca; Raffo, L.
Impact of half-duplex and full-duplex DMA Implementations on NoC performance 1-gen-2010 Palumbo, Francesca; Pani, D; Pilia, A; Raffo, L.
Coarse-Grained Reconfigurable Approach for Multi-Dataflow Systems 1-gen-2011 Carta, N; Palumbo, Francesca; Raffo, L.
The multi-dataflow composer tool: A runtime reconfigurable HDL platform composer 1-gen-2011 Palumbo, Francesca; Carta, N; Raffo, L.
Hybrid switching techniques for heterogeneous traffic support in multi-processors system on chip and massively parallel processors 1-gen-2011 Palumbo, Francesca; Pani, D; Raffo, L.
Towards self-adaptive networks on chip for massively parallel processors: Multilevel quality of service programmability 1-gen-2011 Palumbo, Francesca; Pani, D; Deidda, A; Raffo, L.
Design IP Faster: Introducing the C~ High-Level Language 1-gen-2012 Wipliez, M; Siret, N; Carta, N; Palumbo, Francesca; Raffo, L.
Multi-purpose systems: A novel dataflow-based generation and mapping strategy 1-gen-2012 Nezan, Jf; Siret, N; Wipliez, M; Palumbo, Francesca; Raffo, L.
A nature-inspired adaptive floating-point coprocessing system 1-gen-2012 Sau, C; Pani, D; Palumbo, Francesca; Raffo, L.
Concurrent hybrid switching for massively parallel systems-on-chip: The CYBER architecture 1-gen-2012 Palumbo, Francesca; Pani, D; Congiu, A; Raffo, L.
Profiling of Dataflow-Based Coarse-Grained Reconfigurable Platforms 1-gen-2013 Sau, C; Palumbo, Francesca; Raffo, L.
A coarse-grained reconfigurable approach for low-power spike sorting architectures 1-gen-2013 Carta, N; Sau, C; Pani, D; Palumbo, Francesca; Raffo, L.
DSE and profiling of multi-context coarse-grained reconfigurable systems 1-gen-2013 Palumbo, Francesca; Sau, C; Raffo, L.
A coarse-grained reconfigurable wavelet denoiser exploiting the multi-dataflow composer tool 1-gen-2013 Carta, N; Sau, C; Palumbo, Francesca; Pani, D; Raffo, L.
Mostrati risultati da 1 a 20 di 77
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